Título: Vectorisation in a Functional Language Compiler
Palestrante: Neal Glew
Data: 11/01/2011 (quinta-feira)
Horário: 14:00
Local: Sala 352, Instituto de Computação/Unicamp
Mini CV:
Neal is a Senior Staff Researcher at the Intel Labs. He hails from Wellington, received a BSc(hons) in Computer Science from VUW in 1993 and a PhD in Computer Science from Cornell in 2000. He worked for InterTrust Technologies Corporation before joining Intel in 2002. Ever since he has worked in the Programming Systems Lab on first Java virtual machines and then a compiler for a new not-yet-public functional programming language designed for parallelism, which has now been extended to compile Haskell as well.
Resumo:
Modern processors include vector registers and vector instruction sets. For example, SSE defines a set of eight 128 bit wide registers that are capable of holding four single-precision floating point numbers or two double-precision floating point numbers. SSE includes instructions like a parallel elementwise add of four single-precision floating point instructions, 128 bit loads and stores, permuting the elements of a vector registers, and so on. To take advantage of such instructions sets it is desirable for compilers to transform code written in a straight forward way into code that uses vector registers and vector instructions, a transformation that is called vectorisation. There has been much research done on automatic vectorisation. Building on that past work, last year, my team implemented a basic vectorisation framework in a compiler for an experimental functional programming language that is targeted towards Intel's vector ISAs - namely SSE and the AVX extension of SSE. While our implementation is not novel research, the resulting framework turned out to be quite elegant, and this talk will provide a summary of vectorisation using our implementation to illustrate the ideas.
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